1. Field of the Invention
The present invention relates to a liquid crystal display device including a thin film transistor and more particularly, to a system and a method for reducing OFF-current in a thin film transistor of a liquid crystal display device.
2. Discussion of the Related Art
Due to rapid development in information technology, display devices have to display large amounts of information. Although cathode ray tube (CRT) devices have been commonly used as display devices, flat panel display devices have been developed that are thin, light weight, and low in power consumption. Among these, liquid crystal display (LCD) devices have been used in notebook computers and desktop monitors because of their superior image resolution, color image display, and display image quality.
The LCD devices include an upper substrate, a lower substrate, and a liquid crystal material layer disposed between the upper and lower substrates. The LCD devices make use of optical anisotropy of liquid crystal molecules to produce image data by varying light transmittance according to an arrangement of the liquid crystal molecules that are controlled by an electric field.
One substrate of the LCD device includes a thin film transistor that functions as a switching element. An LCD device that includes the thin film transistor is commonly referred to as an active matrix liquid crystal display (AMLCD) device. The AMLCD device has high image resolution and can display moving images.
Amorphous silicon is commonly used as an active layer of a thin film transistor since amorphous silicon can be formed on large, low cost substrates, such as glass, under relatively low temperatures. However, although the LCD device is better than the CRT in power consumption, the LCD device including amorphous silicon is very expensive.
FIG. 1 is a schematic view of an LCD device according to the related art. In FIG. 1, gate and data driver ICs are connected to an array substrate, which includes an amorphous silicon TFT in a display area, using a tape automated bonding (TAB) method. The driver IC is a large scale integration (LSI) device and includes complementary metal-oxide-semiconductor (CMOS) devices that use single crystalline silicon as active layers. Accordingly, the driver IC is very costly.
In a high resolution LCD device, such as a super extended graphic array (SXGA), which has a resolution of 1280×1024, the LCD device requires a total of (1280×3)+1024 leads to connect the driver ICs to the array substrate. Accordingly, this decreases reliability and productivity of the LCD device. Additionally, this raises the cost of the LCD device.
Since devices that include active layers made of amorphous silicon are expensive to fabricate, LCD devices that include polycrystalline silicon as active layers of the TFTs have been developed. Accordingly, the number of fabrication steps can be reduced since the thin film transistors and driver IC can be formed on the same substrate, eliminating the need for TAB bonding.
FIG. 2 is a schematic view of another LCD device according to the related art. In FIG. 2, gate and data driver ICs are formed on an array substrate that includes polycrystalline silicon TFTs provided in a display area. The LCD device is commonly referred to as a chip on glass (COG) type device. In addition, field effect mobility of polycrystalline silicon is about 100 to 200 times greater than field effect mobility of amorphous silicon. Moreover, polycrystalline silicon is also optically and thermally stable.
FIG. 3 is a cross sectional view of a polycrystalline silicon TFT according to the related art. In FIG. 3, a buffer layer 11 is formed on a transparent substrate 10 and a polycrystalline silicon layer 12 is formed on the buffer layer 11. The polycrystalline silicon layer 12 includes an active layer 12a and source and drain regions 12b and 12c. A gate insulating layer 13 is formed on the polycrystalline silicon layer 12 and a gate electrode 14 is formed on the gate insulating layer 13, wherein the gate electrode 14 corresponds to the active layer 12a. An inter-insulating layer 15 covers the substrate 10 including the gate electrode 14, and the inter-insulating layer 15 has first and second contact holes 15a and 15b. The first and second contact holes 15a and 15b expose the source and drain regions 12b and 12c, respectively. Source and drain electrodes 16 and 17 are formed on the inter-insulating layer 15. The source and drain electrodes 16 and 17 are connected to the source and drain regions 12b and 12c through the first and second contact holes 15a and 15b, respectively. A passivation layer 18 is formed on the source and drain electrodes 16 and 17, and the passivation layer 18 has a third contact hole 18a exposing the drain electrode 17. A pixel electrode 19 is formed on the passivation layer 18, and is connected to the drain electrode 17 through the third contact hole 18a. 
FIG. 4 is a perspective view of an LCD device including the polycrystalline silicon thin film transistor of FIG. 3 according to the related art. In FIG. 4, an LCD device includes lower and upper substrates 20 and 30, which are spaced apart and facing each other, and a liquid crystal material layer 40 disposed between the upper and lower substrates 30 and 20. A gate line 22 and a data line 24 are formed on an inside of the lower substrate 20 to cross each other, thereby defining a pixel region P. A thin film transistor T, which includes polycrystalline silicon as an active layer and has a structure of FIG. 3, is provided at the crossing of the gate line 22 and the data line 24. A pixel electrode 26 is formed within the pixel region P and is connected to the thin film transistor T.
In addition, a black matrix 32, which has an opening corresponding to the pixel electrode 26, is formed on an inside of the upper substrate 30. A color filter layer 34 that corresponds to the opening of the black matrix 32 is formed on the black matrix 32. The color filter layer 34 includes three color filters red (R), green (G), and blue (B), wherein each color corresponds to a respective pixel electrode 26. In addition, a common electrode 36 is formed on the color filter layer 34.
The lower substrate 20 including the thin film transistor T and the pixel electrode 26 may be commonly referred to as an array substrate, and the upper substrate 30 including the color filter layer 34 may be commonly referred to as a color filter substrate.
FIG. 5 is a schematic view of an equivalent circuit view for a pixel of the LCD device of FIG. 4 according to the related art. In FIG. 5, an equivalent circuit of a pixel of the LCD device of FIG. 4 includes a P-TFT interconnected between a data line and a gate line, wherein a signal transmitted along the gate line enables the P-TFT to transmit an image signal along the data line. Accordingly, a liquid crystal cell capacitance CLC of the liquid crystal cell, which is formed with the common line, and a storage capacitance CSTG, which is formed with the storage line, are formed when the P-TFT is enabled.
The array substrate and the color filter substrate are manufactured through various fabricating processes, respectively, and are subsequently assembled. The array substrate goes through various inspection processes before and after assembly, including a process to stabilize the polycrystalline silicon thin film transistor (TFT). Leakage current, which is commonly referred to as OFF-current, occurs due to the presence of electron carriers in a vicinity of the P-N junction of the polycrystalline silicon TFT when the polycrystalline silicon TFT is driven for a long period of time under normal operating temperatures. The leakage current causes residual images that lead to degradation of pixels of the LCD device. Therefore, a process for decreasing the OFF-current of the polycrystalline silicon TFT is required.
The OFF-current can be reduced by generating an OFF-stress at each junction region of the polycrystalline silicon TFT. For example, one method for reducing OFF-state current in field effect transistors is disclosed by Fonash et al. (U.S. Pat. No. 5,945,866). Direct current (DC) voltage or alternating current (AC) voltage may be used to generate the OFF-stress. However, since the LCD device includes storage capacitors, it is difficult to apply the DC voltage to the pixel TFTs.